ID | Name | Meaning |
---|---|---|
1 | Subrack No. | Number of the subrack where the faulty CPU is generated |
2 | Slot No. | Number of the slot where the faulty CPU is generated |
3 | CPU No. | Number of the faulty CPU in a board |
4 | Alarm Attribute | 0=Normal, Alarms period are longer than the Transient Threshold. 1=Transient Count, The times and the period of the alarms whose periods are shorter than the Transient Threshold are summed up. If the sum result is longer than the Alarm Occurrence Period Threshold or Alarm Occurrence Times Threshold, an alarm so called Transient Count Alarm is triggered. Because Transient Count Alarm is based on accumulative result, the recovery of the alarm may occur at least one Summing Cycle later. The Summing Cycle can be query by MML "LST STATSLDWIN". |
In active/standby mode:
In separated mode:
Y => The alarm handling is complete.
N => Go to 2.
Y => The alarm handling is complete.
N => Go to 3.
Y => The alarm handling is complete.
N => Go to 4.
Y => The alarm handling is complete.