Video Card Recommendations

[This is preliminary documentation and subject to change.]

The following features are recommended for video cards supporting Broadcast Architecture on computers running the Microsoft® Windows® 98 operating system:

• The standard Video Graphics Array (VGA) page frame and input/output (I/O) address resources should be static (that is, they cannot be relocated). The VGA basic input/output system (BIOS), if it exists separately, has the base address fixed at C000h.
• A linear frame buffer should be used. It must be possible to relocate this buffer above the 16 megabyte boundary by using software, where applicable.
• The card BIOS should meet the Display Data Channel 1(DDC1) host requirements documented in the Video Electronics Standards Association (VESA) DDC standard.
• The video card ROM or virtual display driver should support the VESA BIOS extensions for power management (that is, the VESA BIOS Extensions/Power Management Standard).
• Color ordering should be blue-green-red, with red as the high byte in displays supporting 16 bits per pixel and 24 bits per pixel. This ordering takes advantage of Windows 98 graphics capabilities.
• The VGA BIOS, if it exists separately, should be configurable to two addresses at a minimum.
• Any 24-bit or higher-bit displays should support downloadable entries in random access memory digital-to-analog converter (RAMDAC) format. Such support allows gamma correction in hardware.
• The card should connect to a high-speed expansion bus, such as a PCI bus.
• The card should be capable of supporting a monitor resolution of at least 800 x 600 by 8 bits per pixel.
• The VGA video plane should support color keying.
• If interrupt request 2 (IRQ2) is supported for VGA compatibility, it should be inactive when the computer is turned on. The computer should not claim IRQ2 as a static resource.
• If extended display resources are used, the card should at a minimum be able to map the I/O addresses to seven locations and to disable them. However, this functionality is not necessary if the extended resource addresses are aliases of the standard VGA addresses.
• A software-tunable crystal should be used, so that the 27-megahertz clock driving the MPEG chip can match the 27-megahertz clock from the broadcaster. Software drivers adjust the MPEG chip's frequency to match the rate captured by the broadcast receiver card. The range and number of steps for tunability are based on crystal accuracy and the requirements for NTSC color signals.
• Both super Video Graphics Array (SVGA) and MPEG video clocks should be based on the same tunable crystal. This functionality prevents skipped or doubled frames due to slight differences in frequency between two different crystals.
• For improved picture quality, the card should support horizontal and vertical interpolation as specified for Comité Consultatif International des Radiocommunications (CCIR) 601 video, 720 x 480 x YUV 4:2:2 screen resolution at 60 hertz.

For more detailed information about these features, refer to Hardware Design Guide for Microsoft® Windows® 95, available from Microsoft Press®.

Another important point to note is that both the MPEG decoder and the SVGA should be running at the same 60 frames per second to avoid beat frequency artifacts. One solution is to have the MPEG decoder and the SVGA share a single clock crystal tunable to a voltage-controlled crystal oscillator (VCXO). This crystal is run through a phased lock loop to generate both the 27 megahertz decoder clock and the SVGA pixel clocks. This clock tuning is necessary to synchronize the clocks to the MPEG encoder's time base of 60 hertz.