Pages and Page Translation

The 32-bit linear address space used by the Intel 80386 and later microprocessors is divided into 4 kilobyte units called pages. Each page can be assigned specific permissions, and can be mapped to any 4K section of physical memory. The base physical address of a page is its page frame address. A page can also be marked not present, in which case it does not map to any physical memory.

Page mapping is possible because of page translation, the mechanism by which the CPU translates linear addresses to physical addresses. A linear address can be viewed as a combination of two values: a 20-bit page number, and a 12-bit offset (4K = 2^12 bytes). The CPU uses the page number to locate a page descriptor, which contains a page frame address and other information. Adding the offset to the page frame address yields a physical address. A page that is marked not present does not map to any physical address. Attempting to access such a page triggers a page fault. Typically, a page is marked not present if has been temporarily swapped out to disk or if no physical storage has been allocated for the page. In addition, virtual devices may mark a hooked page as not present in order to trigger a page fault every time the page is accessed. The system does something similar for instanced pages. Page descriptors are organized into page tables. By creating more than one set of page tables, the system can define more than one address space, each with a unique mapping of pages to physical storage. Virtual devices should not manipulate page tables directly. (Doing so is virtually guaranteed to result in incompatibilities with future versions of Windows.) However, a virtual device can use VMM services to get information about the current address space and to change the way pages are mapped to physical storage.